Author

Taha Amiralli

Date of Award

2007

Degree Type

Thesis

Degree Name

Master of Engineering Science

Program

Electrical and Computer Engineering

Supervisor

Dr. Anestis Dounavis

Abstract

Recent advances in fabrication technologies have enabled the design of more complex integrated circuits and micro-electromechanical systems that operate at ever increasing frequencies. As a result, modern systems on a chip (SOC) designs integrate various integrated circuitry and MEMS devices to solve multiple engineering problems using a single package. The widespread adoption of these emerging fabrication technologies over the last few years have created a pressing demand for more effective and efficient, automated verification and optimization strategies/tools, in order to avoid costly redesigns and multiple silicon re-spins. Model Order Reduction (MOR) techniques have surfaced as viable techniques for creating accurate and reduced-order linear dynamic models (Macro-models) to solve large systems of equations in a reasonable amount of time. In this thesis work, compatible computational prototyping MOR algorithms, for both the integrated circuit and the MEMS simulation/verification domains, are developed to address the sources of computational inefficiencies that exist in currently published MOR algorithms for these respective simulation/verification domains.

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